/**
  ******************************************************************************
  * @file    DPC_Control_Layer.c
  * @author  STMicroelectronics
  * @version 1.0.0
  * @date    10-Jun-2022
  * @brief   HW control functions body
  * @details This application example is a Buck PSU converter
  ******************************************************************************
  *
  * Copyright (c) 2022 STMicroelectronics.
  * All rights reserved.
  *
  * This software is licensed under terms that can be found in the LICENSE file in
  * the root directory of this software component.
  * If no LICENSE file comes with this software, it is provided AS-IS.
  ******************************************************************************
  */

/** @addtogroup STM32_DPOW
  * @brief  Digital Power application implemented with a STM32 MCU
  * @{
  */

/** @addtogroup DCDC_Control_Layer
  * @{
  */

/* Includes ------------------------------------------------------------------*/
#include "main.h"
#include "stm32g4xx_hal.h"
#include "app_X-CUBE-DPower.h"
#include "DCDC_Control_Layer.h"
#include "DPC_Lib_Conf.h"
#include "DCDC_Globals.h"
#include "DCDC_PWMnCurrVoltFdbk.h"

/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Exported variables --------------------------------------------------------*/
/* Exported functions ---------------------------------------------------------*/
/**
  * @brief  Sets the counter passed by reference at new value
  * @param  phCounter_to_set: Pointer to the counter to set
  * @param  hNew_counter_value new counter value
  * @retval None
  */
#if defined (__ICCARM__)
#pragma location = ".ccmram" // IAR
#elif defined (__ARMCOMPILER_VERSION) || defined (__CC_ARM) || defined(__GNUC__)
 __attribute__( ( section ( ".ccmram" ) ) ) // CubeIDE and Keil
#endif
void SetDelayTime(uint16_t volatile *phCounter_to_set, uint16_t hNew_counter_value)
{
 *phCounter_to_set = hNew_counter_value;
}

/**
  * @brief  Checks if the counter passed by reference is equal to zero
  * @param  phCounter_to_check: Pointer to the counter to check
  * @retval bool true or false
  */
#if defined (__ICCARM__)
#pragma location = ".ccmram" // IAR
#elif defined (__ARMCOMPILER_VERSION) || defined (__CC_ARM) || defined(__GNUC__)
 __attribute__( ( section ( ".ccmram" ) ) ) // CubeIDE and Keil
#endif
bool DelayTimeIsElapsed(uint16_t volatile *phCounter_to_check)
{
 if (*phCounter_to_check == 0)
 {
   return (true);
 }
 else
 {
   return (false);
 }
}

/**
  * @brief  Enable Gate driver for Leg2
  * @param  None
  * @retval None
  */
void DCDC_GateDriverEnable(void)
{
  /* Enable Driver for Leg2 */
  HAL_GPIO_WritePin(GPIOB, BUCKBOOST_N2_DRIVE_Pin, GPIO_PIN_RESET);
  HAL_GPIO_WritePin(GPIOB, BUCKBOOST_P2_DRIVE_Pin, GPIO_PIN_SET);
}

/**
  * @brief  Disable Gate driver for Leg2
  * @param  None
  * @retval None
  */
void DCDC_GateDriverDisable(void)
{
  /* Disable Driver for Leg2 */
  HAL_GPIO_WritePin(GPIOB, BUCKBOOST_N2_DRIVE_Pin, GPIO_PIN_RESET);
  HAL_GPIO_WritePin(GPIOB, BUCKBOOST_P2_DRIVE_Pin, GPIO_PIN_RESET);
}

/**
  * @brief  Enable main PWMs
  * @param  hhrtim: pointer to HRTIM handler
  * @retval None
  */
void DCDC_PWMOutputEnable(HRTIM_HandleTypeDef * hhrtim)
{
  /* Main Output Enable */
  HAL_HRTIM_WaveformOutputStart(&DPC_APPL_HRTIM, HRTIM_OUTPUT_TC1 | HRTIM_OUTPUT_TC2);

  /* Set boolean variable */
  bDCDC_OutputEnabled = true;
}

/**
  * @brief  Disable main PWMs and synch. rect. PWMs
  * @param  hhrtim: pointer to HRTIM handler
  * @retval None
  */
void DCDC_PWMOutputDisable(HRTIM_HandleTypeDef * hhrtim)
{
  /* Main output Disable */
  HAL_HRTIM_WaveformOutputStop(&DPC_APPL_HRTIM, HRTIM_OUTPUT_TC1 | HRTIM_OUTPUT_TC2);

  /* Reset boolean variable */
  bDCDC_OutputEnabled = false;
}

/**
  * @} end DCDC_Control_Layer
  */

/**
  * @} end STM32_DPOW
  */
